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| author |   Ravi Bangoria <ravi.bangoria@amd.com> | 2023-07-25 20:32:04 +0530 |
|---|---|---|
| committer |   Peter Zijlstra <peterz@infradead.org> | 2023-07-26 12:28:44 +0200 |
| commit | 526fffabc5fb63e80eb890c74b6570df2570c87f (patch) | |
| tree | be01a3c6b033cd50464788010451c8e949ddd5bd | |
| parent | perf/ring_buffer: Use local_try_cmpxchg in __perf_output_begin (diff) | |
| download | wireguard-linux-526fffabc5fb63e80eb890c74b6570df2570c87f.tar.xz wireguard-linux-526fffabc5fb63e80eb890c74b6570df2570c87f.zip | |
perf/mem: Introduce PERF_MEM_LVLNUM_UNC
Older API PERF_MEM_LVL_UNC can be replaced by PERF_MEM_LVLNUM_UNC.
Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230725150206.184-2-ravi.bangoria@amd.com
| -rw-r--r-- | include/uapi/linux/perf_event.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index 37675437b768..39c6a250dd1b 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -1339,7 +1339,8 @@ union perf_mem_data_src { #define PERF_MEM_LVLNUM_L2 0x02 /* L2 */ #define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ #define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ -/* 5-0x8 available */ +/* 5-0x7 available */ +#define PERF_MEM_LVLNUM_UNC 0x08 /* Uncached */ #define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */ #define PERF_MEM_LVLNUM_IO 0x0a /* I/O */ #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ |