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author | 2024-10-27 03:24:42 +0200 | |
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committer | 2024-11-05 16:19:40 -0800 | |
commit | 528e7bb0cabad075ba6e6c84ba30301718cc75e3 (patch) | |
tree | f5ecccb0577fce6a1b7a3eb0fd22858b39ca6d37 | |
parent | dt-bindings: clock: qcom: document SAR2130P Global Clock Controller (diff) | |
download | wireguard-linux-528e7bb0cabad075ba6e6c84ba30301718cc75e3.tar.xz wireguard-linux-528e7bb0cabad075ba6e6c84ba30301718cc75e3.zip |
dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible
Document compatible for the TCSR Clock Controller on SAR2130P platform.
It is mostly compatible with the SM8550, except that it doesn't provide
UFS clocks.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-3-ecad2a1432ba@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index 48fdd562d743..3b546deb514a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -21,6 +21,7 @@ properties: compatible: items: - enum: + - qcom,sar2130p-tcsr - qcom,sm8550-tcsr - qcom,sm8650-tcsr - qcom,x1e80100-tcsr |