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authorArnd Bergmann <arnd@arndb.de>2022-05-09 23:07:41 +0200
committerArnd Bergmann <arnd@arndb.de>2022-05-09 23:07:41 +0200
commit60166b3c6961560e2cf52f349b62b2194e77217f (patch)
treebdd168c6f37275769ea26ddbb6caf5336737a6ce
parentMerge tag 'tegra-for-5.19-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc (diff)
parentARM: hisi: Add missing of_node_put after of_find_compatible_node (diff)
downloadwireguard-linux-60166b3c6961560e2cf52f349b62b2194e77217f.tar.xz
wireguard-linux-60166b3c6961560e2cf52f349b62b2194e77217f.zip
Merge tag 'hisi-armv7soc-for-5.19' of https://github.com/hisilicon/linux-hisi into arm/soc
HiSilicon ARMv7 SoC updates for v5.19 - Add of_node_put to avoid the refcount leak * tag 'hisi-armv7soc-for-5.19' of https://github.com/hisilicon/linux-hisi: ARM: hisi: Add missing of_node_put after of_find_compatible_node Link: https://lore.kernel.org/r/62762DF0.30602@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-hisi/platsmp.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach-hisi/platsmp.c
index a56cc64deeb8..9ce93e0b6cdc 100644
--- a/arch/arm/mach-hisi/platsmp.c
+++ b/arch/arm/mach-hisi/platsmp.c
@@ -67,14 +67,17 @@ static void __init hi3xxx_smp_prepare_cpus(unsigned int max_cpus)
}
ctrl_base = of_iomap(np, 0);
if (!ctrl_base) {
+ of_node_put(np);
pr_err("failed to map address\n");
return;
}
if (of_property_read_u32(np, "smp-offset", &offset) < 0) {
+ of_node_put(np);
pr_err("failed to find smp-offset property\n");
return;
}
ctrl_base += offset;
+ of_node_put(np);
}
}
@@ -160,6 +163,7 @@ static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)
if (WARN_ON(!node))
return -1;
ctrl_base = of_iomap(node, 0);
+ of_node_put(node);
/* set the secondary core boot from DDR */
remap_reg_value = readl_relaxed(ctrl_base + REG_SC_CTRL);