diff options
| author |   Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2025-01-30 10:46:07 +0530 |
|---|---|---|
| committer |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-01-30 19:44:43 +0530 |
| commit | 6218bd2e649ab3bcd097d7903dd4b93baa21c73d (patch) | |
| tree | 76257308f0b1dffffdf79f40918730aa99a2dc11 | |
| parent | drm/i915/dp: fix the Adaptive sync Operation mode for SDP (diff) | |
| download | wireguard-linux-6218bd2e649ab3bcd097d7903dd4b93baa21c73d.tar.xz wireguard-linux-6218bd2e649ab3bcd097d7903dd4b93baa21c73d.zip | |
drm/i915/dp: Compute as_sdp.vtotal based on vrr timings
Compute as_sdp.vtotal based on minimum vtotal calculated
during vrr computation.
--v2:
- make a separate patch and update to vmin only [Ankit].
--v3:
- Update vtotal to vmin for cmrr case as well [Ankit].
--v4:
- update vtotal with wrapper function of vmin [Ville]
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250130051609.1796524-5-mitulkumar.ajitkumar.golani@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0aeb2d188d80..c9ddf6eb2b25 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2834,15 +2834,14 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; as_sdp->length = 0x9; as_sdp->duration_incr_ms = 0; + as_sdp->vtotal = intel_vrr_vmin_vtotal(crtc_state); if (crtc_state->cmrr.enable) { as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; - as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); as_sdp->target_rr_divider = true; } else { as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; - as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = 0; } } |