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| author |   André Draszik <andre.draszik@linaro.org> | 2025-02-10 12:52:03 +0000 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-02-15 14:30:19 +0100 |
| commit | 6572a93ab35eb5a34c65d561bd00e32f3a4b7ab2 (patch) | |
| tree | d2610ebb70925b5076aba5ca6d2efc94d68e79d9 | |
| parent | arm64: dts: exynos: gs101: drop explicit regmap from reboot nodes (diff) | |
| download | wireguard-linux-6572a93ab35eb5a34c65d561bd00e32f3a4b7ab2.tar.xz wireguard-linux-6572a93ab35eb5a34c65d561bd00e32f3a4b7ab2.zip | |
arm64: dts: exynos: gs101: align poweroff writes with downstream
For power off, downstream only clears bit 8 and leaves all other bits
untouched, whereas this here ends up setting bit 8 and clearing all
others, due to how sysconf-poweroff parses the DT.
I noticed this discrepancy while debugging some reboot related
differences between up- and downstream and it's useful to align the
behaviour here.
Note: for reboot downstream seems to be incorrectly writing 0x00000002
and not just setting bit 1 (which is the only R/W bit in this
register), so we keep that one as-is here.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250210-gs101-renppt-dts-v2-2-fb33fda6fc4b@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/google/gs101.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index e78dcd506a5c..86741994bb7c 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1401,7 +1401,8 @@ poweroff: syscon-poweroff { compatible = "syscon-poweroff"; offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */ - mask = <0x100>; /* reset value */ + mask = <0x00000100>; + value = <0x0>; }; reboot: syscon-reboot { |