diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-18 22:58:47 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-27 22:44:39 +0200 |
| commit | 76b7be63d9f33e8f319e480c50d3e53460927add (patch) | |
| tree | 9d6b107c5c6253f082f783a1ed821c52de400cf4 | |
| parent | drm/i915/pfit: split out intel_pfit_regs.h (diff) | |
| download | wireguard-linux-76b7be63d9f33e8f319e480c50d3e53460927add.tar.xz wireguard-linux-76b7be63d9f33e8f319e480c50d3e53460927add.zip | |
drm/i915/dsb: Allow DSB based updates without planes
We don't actually need any planes to get updated in order
to perform the commit on the DSB. Allow DSB based updates
even when we don't touch planes. The main benefit here
is that pure LUT updates will now go through the DSB path
and therefore we don't have to do vblank evasion/etc. on
the CPU.
I think the reason I had this excluded was that I was
originally contemplating using frame/flip timestamps as
a way to complete the commits. But I had to scrap that
idea when it turned out that those timestamp get
corrupted when DSB is poking at random registers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218205850.1422-2-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ecc39ffd8dd0..4843ad19899e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7175,7 +7175,6 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state, /* FIXME deal with everything */ new_crtc_state->use_dsb = - new_crtc_state->update_planes && !new_crtc_state->do_async_flip && (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) && !new_crtc_state->scaler_state.scaler_users && |