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author | 2019-11-25 15:50:06 +0100 | |
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committer | 2019-12-11 10:20:18 +0800 | |
commit | 8c8d09e24d4556517a53cbe6cfd0e545fdbcde22 (patch) | |
tree | 6e3fe5c5a2e33a1d0ce772c431cbadf029c1e9cf | |
parent | dt-bindings: arm: fsl: add compatible string for Tolino Shine 3 (diff) | |
download | wireguard-linux-8c8d09e24d4556517a53cbe6cfd0e545fdbcde22.tar.xz wireguard-linux-8c8d09e24d4556517a53cbe6cfd0e545fdbcde22.zip |
dt-bindings: mxsfb: Add compatible for iMX8MQ
NXP's iMX8MQ has an LCDIF as well.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/display/mxsfb.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/mxsfb.txt b/Documentation/devicetree/bindings/display/mxsfb.txt index 472e1ea6c591..c985871c46b3 100644 --- a/Documentation/devicetree/bindings/display/mxsfb.txt +++ b/Documentation/devicetree/bindings/display/mxsfb.txt @@ -6,6 +6,7 @@ Required properties: - compatible: Should be "fsl,imx23-lcdif" for i.MX23. Should be "fsl,imx28-lcdif" for i.MX28. Should be "fsl,imx6sx-lcdif" for i.MX6SX. + Should be "fsl,imx8mq-lcdif" for i.MX8MQ. - reg: Address and length of the register set for LCDIF - interrupts: Should contain LCDIF interrupt - clocks: A list of phandle + clock-specifier pairs, one for each |