diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-09-16 18:29:58 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-09-19 14:41:43 +0300 |
| commit | 92699ba9561a032fa3b4a9f5c5dfd24bc9678c46 (patch) | |
| tree | 85fb93be7a7cb0e00549fbad13557d37ee86e46b | |
| parent | drm/i915/color: Extract intel_color_modeset() (diff) | |
| download | wireguard-linux-92699ba9561a032fa3b4a9f5c5dfd24bc9678c46.tar.xz wireguard-linux-92699ba9561a032fa3b4a9f5c5dfd24bc9678c46.zip | |
drm/i915: Extract intel_post_plane_update_after_readout()
Clean up the main commit_tail() codepath a bit by pulling
the post plane update steps that need to performed after
readout into their own little function
(intel_post_plane_update_after_readout()).
Declutters intel_atomic_commit_tail() a bit, and should
hopefully aid in keeping intel_pre_plane_update() vs.
intel_post_plane_update*() in sync.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240916152958.17332-3-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d1b889196001..eb5cacc9625f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1177,6 +1177,22 @@ static void intel_post_plane_update(struct intel_atomic_state *state, intel_encoders_audio_enable(state, crtc); } +static void intel_post_plane_update_after_readout(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + + /* Must be done after gamma readout due to HSW split gamma vs. IPS w/a */ + hsw_ips_post_update(state, crtc); + + /* + * Activate DRRS after state readout to avoid + * dp_m_n vs. dp_m2_n2 confusion on BDW+. + */ + intel_drrs_activate(new_crtc_state); +} + static void intel_crtc_enable_flip_done(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -7532,14 +7548,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_modeset_verify_crtc(state, crtc); - /* Must be done after gamma readout due to HSW split gamma vs. IPS w/a */ - hsw_ips_post_update(state, crtc); - - /* - * Activate DRRS after state readout to avoid - * dp_m_n vs. dp_m2_n2 confusion on BDW+. - */ - intel_drrs_activate(new_crtc_state); + intel_post_plane_update_after_readout(state, crtc); /* * DSB cleanup is done in cleanup_work aligning with framebuffer |