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| author |   Arnd Bergmann <arnd@arndb.de> | 2016-09-13 16:06:41 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2016-09-13 16:06:41 +0200 |
| commit | 94c6a37a74a241c7aa43c46d0575a70732cb4742 (patch) | |
| tree | adb159d563ad773c6f1a2fbfaba0d4c87a284d0c | |
| parent | ARM: dts: artpec: set irq affinity on pmu interrupts (diff) | |
| parent | ARM: dts: lpc18xx: configure dwmac properly (diff) | |
| download | wireguard-linux-94c6a37a74a241c7aa43c46d0575a70732cb4742.tar.xz wireguard-linux-94c6a37a74a241c7aa43c46d0575a70732cb4742.zip | |
Merge tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc into next/dt
Merge "Device Tree additions for LPC18xx platform" from Joachim Eastwood:
Small fix for the compatible string for the NXP SE97 I2C chip on the
Hitex Eval board from Guenter and a couple of additional DT properties
for the DWMAC that is need for correct operation.
* tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc:
ARM: dts: lpc18xx: configure dwmac properly
ARM: dts: lpc4350-hitex-eval: fix binding for SE97 i2c device
| -rw-r--r-- | arch/arm/boot/dts/lpc18xx.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/lpc4350-hitex-eval.dts | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index fdb736c82045..3d828fcfc7c4 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -186,6 +186,10 @@ clock-names = "stmmaceth"; resets = <&rgu 22>; reset-names = "stmmaceth"; + rx-fifo-depth = <256>; + tx-fifo-depth = <256>; + snps,pbl = <4>; /* 32 (8x mode) */ + snps,force_thresh_dma_mode; status = "disabled"; }; diff --git a/arch/arm/boot/dts/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/lpc4350-hitex-eval.dts index 6c9048d4d03c..c97cba1d26a8 100644 --- a/arch/arm/boot/dts/lpc4350-hitex-eval.dts +++ b/arch/arm/boot/dts/lpc4350-hitex-eval.dts @@ -424,7 +424,7 @@ /* NXP SE97BTP with temperature sensor + eeprom */ sensor@18 { - compatible = "nxp,jc42"; + compatible = "nxp,se97", "jedec,jc-42.4-temp"; reg = <0x18>; }; |