diff options
| author |   Mikita Lipski <mikita.lipski@amd.com> | 2021-06-17 16:17:09 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-07-21 13:39:25 -0400 |
| commit | 97b9c006f153fc129fef60fbd91021c8aaf8697f (patch) | |
| tree | fd48b095724f84e2ddeb1ddaa4f6463bc591ea57 | |
| parent | drm/amd/display: Fix timer_per_pixel unit error (diff) | |
| download | wireguard-linux-97b9c006f153fc129fef60fbd91021c8aaf8697f.tar.xz wireguard-linux-97b9c006f153fc129fef60fbd91021c8aaf8697f.zip | |
drm/amd/display: Prevent Diags from entering S2
[why]
Lowering clocks when entering S2 Idle state causes DMUB to hang with
Diags.
[how]
Do not enter S2 optimization with Diags on dcn301 to prevent DMUB hang.
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c index c636b589d69d..7046da14bb2a 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c @@ -114,7 +114,7 @@ void vg_update_clocks(struct clk_mgr *clk_mgr_base, display_count = vg_get_active_display_cnt_wa(dc, context); /* if we can go lower, go lower */ - if (display_count == 0) { + if (display_count == 0 && !IS_DIAG_DC(dc->ctx->dce_environment)) { union display_idle_optimization_u idle_info = { 0 }; idle_info.idle_info.df_request_disabled = 1; |