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author | 2021-12-08 21:17:54 +0800 | |
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committer | 2021-12-14 16:33:02 +0800 | |
commit | a38771d7a49baf682fffd5cb8e1c6aea45ae5d26 (patch) | |
tree | 75b3b59d2d383050d638ce73a0e9d11baf860330 | |
parent | dt-bindings: power: imx8ulp: add power domain header file (diff) | |
download | wireguard-linux-a38771d7a49baf682fffd5cb8e1c6aea45ae5d26.tar.xz wireguard-linux-a38771d7a49baf682fffd5cb8e1c6aea45ae5d26.zip |
arm64: dts: imx8ulp: add scmi firmware node
i.MX8ULP use scmi firmware based power domain and sensor support.
So add the firmware node and the sram it uses.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index fb8714379026..8ee040e3cbae 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/clock/imx8ulp-clock.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/imx8ulp-power.h> #include "imx8ulp-pinfunc.h" @@ -102,6 +103,40 @@ #clock-cells = <0>; }; + sram@2201f000 { + compatible = "mmio-sram"; + reg = <0x0 0x2201f000 0x0 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x2201f000 0x1000>; + + scmi_buf: scmi-buf@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x400>; + }; + }; + + firmware { + scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0xc20000fe>; + #address-cells = <1>; + #size-cells = <0>; + shmem = <&scmi_buf>; + + scmi_devpd: protocol@11 { + reg = <0x11>; + #power-domain-cells = <1>; + }; + + scmi_sensor: protocol@15 { + reg = <0x15>; + #thermal-sensor-cells = <0>; + }; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; |