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authorJoseph Greathouse <Joseph.Greathouse@amd.com>2021-06-29 21:08:52 -0500
committerAlex Deucher <alexander.deucher@amd.com>2021-07-01 00:05:18 -0400
commitaa6158112645aae514982ad8d56df64428fcf203 (patch)
tree1d2165f1f9c94cc61a9f64e5ada35435cf5edd2f
parentdrm/amdgpu: add new dimgrey cavefish DID (diff)
downloadwireguard-linux-aa6158112645aae514982ad8d56df64428fcf203.tar.xz
wireguard-linux-aa6158112645aae514982ad8d56df64428fcf203.zip
drm/amdgpu: Update NV SIMD-per-CU to 2
Navi series GPUs have 2 SIMDs per CU (and then 2 CUs per WGP). The NV enum headers incorrectly listed this as 4, which later meant we were incorrectly reporting the number of SIMDs in the HSA topology. This could cause problems down the line for user-space applications that want to launch a fixed amount of work to each SIMD. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-rw-r--r--drivers/gpu/drm/amd/include/navi10_enum.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/include/navi10_enum.h b/drivers/gpu/drm/amd/include/navi10_enum.h
index d5ead9680c6e..84bcb96f76ea 100644
--- a/drivers/gpu/drm/amd/include/navi10_enum.h
+++ b/drivers/gpu/drm/amd/include/navi10_enum.h
@@ -430,7 +430,7 @@ ARRAY_2D_DEPTH = 0x00000001,
*/
typedef enum ENUM_NUM_SIMD_PER_CU {
-NUM_SIMD_PER_CU = 0x00000004,
+NUM_SIMD_PER_CU = 0x00000002,
} ENUM_NUM_SIMD_PER_CU;
/*