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| author |   Yangbo Lu <yangbo.lu@nxp.com> | 2020-02-11 12:57:58 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2020-02-17 13:52:25 +0800 |
| commit | ab84bad5bb891b1d4dd4ea5cfaedf34190d10ff4 (patch) | |
| tree | eac28024f7356a70e58a44c8bffc0d6fca6e19f1 | |
| parent | arm64: dts: ls1088a: support eMMC HS200 speed mode for RDB board (diff) | |
| download | wireguard-linux-ab84bad5bb891b1d4dd4ea5cfaedf34190d10ff4.tar.xz wireguard-linux-ab84bad5bb891b1d4dd4ea5cfaedf34190d10ff4.zip | |
arm64: dts: ls1028a: support external trigger timestamp fifo of PTP timer
There is an external trigger timestamp fifo for PTP timer
of LS1028A. Add property fsl,extts-fifo for that.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 0bf375ec959b..da3906858430 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -722,6 +722,7 @@ reg = <0x000400 0 0 0 0>; clocks = <&clockgen 4 0>; little-endian; + fsl,extts-fifo; }; }; }; |