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| author |   Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2024-11-01 11:57:18 +0200 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-11-03 12:29:51 +0100 |
| commit | ac948eb8ead1265ff034955bdbbb081744f1e7ed (patch) | |
| tree | 06b8ffaa56b71993dd9224703a34d36c1b805c66 | |
| parent | arm64: dts: renesas: r9a08g045: Add RTC node (diff) | |
| download | wireguard-linux-ac948eb8ead1265ff034955bdbbb081744f1e7ed.tar.xz wireguard-linux-ac948eb8ead1265ff034955bdbbb081744f1e7ed.zip | |
arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTB
Enable the VBATTB controller. It provides the clock for RTC.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241101095720.2247815-8-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 71424e69939e..30bb4f5a7dfd 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -5,6 +5,7 @@ * Copyright (C) 2023 Renesas Electronics Corp. */ +#include <dt-bindings/clock/renesas,r9a08g045-vbattb.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> @@ -344,6 +345,17 @@ }; }; +&vbattb { + assigned-clocks = <&vbattb VBATTB_MUX>; + assigned-clock-parents = <&vbattb VBATTB_XC>; + quartz-load-femtofarads = <12500>; + status = "okay"; +}; + +&vbattb_xtal { + clock-frequency = <32768>; +}; + &wdt0 { timeout-sec = <60>; status = "okay"; |