aboutsummaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
authorAmelie Delaunay <amelie.delaunay@foss.st.com>2024-10-16 14:40:01 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2024-10-29 17:07:05 +0100
commitb0191a5cbc222fc7af3f9511b44d1f330ef980e9 (patch)
tree2cf946f674d00038a6bc9473730262d4d416b232
parentarm64: dts: st: add DMA support on I2C instances of stm32mp25 (diff)
downloadwireguard-linux-b0191a5cbc222fc7af3f9511b44d1f330ef980e9.tar.xz
wireguard-linux-b0191a5cbc222fc7af3f9511b44d1f330ef980e9.zip
arm64: dts: st: add DMA support on SPI instances of stm32mp25
Add dmas and dma-names properties in spi nodes of stm32mp251.dtsi to enable DMA support. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r--arch/arm64/boot/dts/st/stm32mp251.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 06c64b88135c..6fe12e3bd7dd 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -245,6 +245,9 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI2>;
resets = <&rcc SPI2_R>;
+ dmas = <&hpdma 51 0x20 0x3012>,
+ <&hpdma 52 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 23>;
status = "disabled";
};
@@ -257,6 +260,9 @@
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI3>;
resets = <&rcc SPI3_R>;
+ dmas = <&hpdma 53 0x20 0x3012>,
+ <&hpdma 54 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 24>;
status = "disabled";
};
@@ -441,6 +447,9 @@
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI1>;
resets = <&rcc SPI1_R>;
+ dmas = <&hpdma 49 0x20 0x3012>,
+ <&hpdma 50 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 22>;
status = "disabled";
};
@@ -453,6 +462,9 @@
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI4>;
resets = <&rcc SPI4_R>;
+ dmas = <&hpdma 55 0x20 0x3012>,
+ <&hpdma 56 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 25>;
status = "disabled";
};
@@ -465,6 +477,9 @@
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI5>;
resets = <&rcc SPI5_R>;
+ dmas = <&hpdma 57 0x20 0x3012>,
+ <&hpdma 58 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 26>;
status = "disabled";
};
@@ -501,6 +516,9 @@
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI6>;
resets = <&rcc SPI6_R>;
+ dmas = <&hpdma 59 0x20 0x3012>,
+ <&hpdma 60 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 27>;
status = "disabled";
};
@@ -513,6 +531,9 @@
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI7>;
resets = <&rcc SPI7_R>;
+ dmas = <&hpdma 61 0x20 0x3012>,
+ <&hpdma 62 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 28>;
status = "disabled";
};
@@ -559,6 +580,9 @@
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI8>;
resets = <&rcc SPI8_R>;
+ dmas = <&hpdma 171 0x20 0x3012>,
+ <&hpdma 172 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 29>;
status = "disabled";
};