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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-02-17 09:00:46 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-02-18 01:25:38 +0200
commitb6cfae8d9c71b6caed505de4f987862cf2f18c6d (patch)
treec7d3cd389eda283606bdc183b9c09ecef6810a9c
parentdrm/i915: Introduce i915_error_regs (diff)
downloadwireguard-linux-b6cfae8d9c71b6caed505de4f987862cf2f18c6d.tar.xz
wireguard-linux-b6cfae8d9c71b6caed505de4f987862cf2f18c6d.zip
drm/i915: Un-invert {i9xx,i965}_error_mask()
Make life a bit more straightforward by removing the bitwise not from {i9xx,i965}_error_mask() and instead do it when feeding the value to gen2_error_init(). Make life a bit easier I think. Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250217070047.953-8-ville.syrjala@linux.intel.com
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index bba0a0acf0ae..da130e1b5cc1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -838,10 +838,10 @@ static u32 i9xx_error_mask(struct drm_i915_private *i915)
* so we just have to mask off all page table errors via EMR.
*/
if (HAS_FBC(i915))
- return ~I915_ERROR_MEMORY_REFRESH;
+ return I915_ERROR_MEMORY_REFRESH;
else
- return ~(I915_ERROR_PAGE_TABLE |
- I915_ERROR_MEMORY_REFRESH);
+ return I915_ERROR_PAGE_TABLE |
+ I915_ERROR_MEMORY_REFRESH;
}
static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
@@ -900,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
struct intel_uncore *uncore = &dev_priv->uncore;
u32 enable_mask;
- gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
+ gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
dev_priv->irq_mask =
~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
@@ -1011,13 +1011,13 @@ static u32 i965_error_mask(struct drm_i915_private *i915)
* so we can always enable the page table errors.
*/
if (IS_G4X(i915))
- return ~(GM45_ERROR_PAGE_TABLE |
- GM45_ERROR_MEM_PRIV |
- GM45_ERROR_CP_PRIV |
- I915_ERROR_MEMORY_REFRESH);
+ return GM45_ERROR_PAGE_TABLE |
+ GM45_ERROR_MEM_PRIV |
+ GM45_ERROR_CP_PRIV |
+ I915_ERROR_MEMORY_REFRESH;
else
- return ~(I915_ERROR_PAGE_TABLE |
- I915_ERROR_MEMORY_REFRESH);
+ return I915_ERROR_PAGE_TABLE |
+ I915_ERROR_MEMORY_REFRESH;
}
static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -1025,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
struct intel_uncore *uncore = &dev_priv->uncore;
u32 enable_mask;
- gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
+ gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
dev_priv->irq_mask =
~(I915_ASLE_INTERRUPT |