aboutsummaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
authorSergio Paracuellos <sergio.paracuellos@gmail.com>2025-01-20 10:21:42 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2025-02-21 18:03:59 +0100
commitc8292b002d2adf10fd47ae7dec9d610d8abe3c53 (patch)
treea466aba87910fc9d154339a5a60712c34397888e
parentdt-bindings: clock: add clock definitions for Ralink SoCs (diff)
downloadwireguard-linux-c8292b002d2adf10fd47ae7dec9d610d8abe3c53.tar.xz
wireguard-linux-c8292b002d2adf10fd47ae7dec9d610d8abe3c53.zip
mips: dts: ralink: rt2880: update system controller node and its consumers
Current RT2880 device tree file system controller node is wrong since it is not matching bindings. Hence, update it to match current bindings updating it also to use new introduced clock constants. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r--arch/mips/boot/dts/ralink/rt2880.dtsi10
-rw-r--r--arch/mips/boot/dts/ralink/rt2880_eval.dts2
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/mips/boot/dts/ralink/rt2880.dtsi b/arch/mips/boot/dts/ralink/rt2880.dtsi
index 8fc1987d9063..1f2ea3434324 100644
--- a/arch/mips/boot/dts/ralink/rt2880.dtsi
+++ b/arch/mips/boot/dts/ralink/rt2880.dtsi
@@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -25,9 +27,11 @@
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
- compatible = "ralink,rt2880-sysc";
+ sysc: syscon@0 {
+ compatible = "ralink,rt2880-sysc", "syscon";
reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
intc: intc@200 {
@@ -50,6 +54,8 @@
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
+ clocks = <&sysc RT2880_CLK_UARTLITE>;
+
interrupt-parent = <&intc>;
interrupts = <8>;
diff --git a/arch/mips/boot/dts/ralink/rt2880_eval.dts b/arch/mips/boot/dts/ralink/rt2880_eval.dts
index 759bc1dd5b83..9854a4b120e9 100644
--- a/arch/mips/boot/dts/ralink/rt2880_eval.dts
+++ b/arch/mips/boot/dts/ralink/rt2880_eval.dts
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
-/include/ "rt2880.dtsi"
+#include "rt2880.dtsi"
/ {
compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";