diff options
| author |   Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2024-12-16 19:56:08 +0200 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2025-02-18 15:40:52 -0600 |
| commit | d06cc1e3809040e8250f69a4c656e3717e6b963c (patch) | |
| tree | b9e3a4e681dc3955467e52b8016900d33579de5f | |
| parent | PCI: Use downstream bridges for distributing resources (diff) | |
| download | wireguard-linux-d06cc1e3809040e8250f69a4c656e3717e6b963c.tar.xz wireguard-linux-d06cc1e3809040e8250f69a4c656e3717e6b963c.zip | |
PCI: Remove add_align overwrite unrelated to size0
Commit 566f1dd52816 ("PCI: Relax bridge window tail sizing rules")
relaxed bridge window tail alignment rule for the non-optional part
(size0, no add_size/add_align). The change, however, also overwrote
add_align, which is only related to case where optional size1 related
entry is added into realloc head.
Correct this by removing the add_align overwrite.
Link: https://lore.kernel.org/r/20241216175632.4175-2-ilpo.jarvinen@linux.intel.com
Fixes: 566f1dd52816 ("PCI: Relax bridge window tail sizing rules")
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Xiaochun Lee <lixc17@lenovo.com>
| -rw-r--r-- | drivers/pci/setup-bus.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 3d876d493faf..3a1fcaad142a 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1149,7 +1149,6 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, min_align = 1ULL << (max_order + __ffs(SZ_1M)); min_align = max(min_align, win_align); size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), win_align); - add_align = win_align; pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n", b_res, &bus->busn_res); } |