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authorArtur Weber <aweber.kernel@gmail.com>2024-08-16 09:51:01 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-12-29 11:05:45 +0100
commitd15cc681ba79fdc722d4aa7a83e572850cf5f64a (patch)
tree74cb965bb8190153b959c3e447ef94e514fba446
parentARM: dts: samsung: exynos4212-tab3: Fix headset mic, add jack detection (diff)
downloadwireguard-linux-d15cc681ba79fdc722d4aa7a83e572850cf5f64a.tar.xz
wireguard-linux-d15cc681ba79fdc722d4aa7a83e572850cf5f64a.zip
ARM: dts: samsung: exynos4212-tab3: Add MCLK2 clock to WM1811 codec config
In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K, which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in mainline as S2MPS11_CLK_BT. Add the MCLK2 clock to the WM1811 codec clock property to properly describe the hardware. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-4-48ee7f2293b3@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-rw-r--r--arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi
index bbafd4ece5f7..5106bb752b7d 100644
--- a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi
@@ -535,8 +535,9 @@
wm1811: audio-codec@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
- clocks = <&pmu_system_controller 0>;
- clock-names = "MCLK1";
+ clocks = <&pmu_system_controller 0>,
+ <&s5m8767_osc S2MPS11_CLK_BT>;
+ clock-names = "MCLK1", "MCLK2";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gpx3>;