diff options
| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-06-23 22:03:00 +0200 |
|---|---|---|
| committer |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-06-25 19:55:58 +0300 |
| commit | d6c7c411be788d1cf78a4fdec3ce080a8f2e39e1 (patch) | |
| tree | c433f6d2ffb703aebc53ff0dfa4b6ed87a00978e | |
| parent | drm/msm/dpu: remove CRTC frame event callback registration (diff) | |
| download | wireguard-linux-d6c7c411be788d1cf78a4fdec3ce080a8f2e39e1.tar.xz wireguard-linux-d6c7c411be788d1cf78a4fdec3ce080a8f2e39e1.zip | |
dt-bindings: display/msm/gpu: constrain clocks in top-level
We expect each schema with variable number of clocks, to have the widest
constrains in top-level "properties:". This is more readable and also
makes binding stricter, if there is no "if:then:" block for given
variant.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/600504/
Link: https://lore.kernel.org/r/20240623-qcom-adreno-dts-bindings-driver-v2-1-9496410de992@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/display/msm/gpu.yaml | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 40b5c6bd11f8..253e68d92779 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -32,9 +32,13 @@ properties: - pattern: '^amd,imageon-200\.[0-1]$' - const: amd,imageon - clocks: true + clocks: + minItems: 2 + maxItems: 7 - clock-names: true + clock-names: + minItems: 2 + maxItems: 7 reg: minItems: 1 |