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author | 2025-01-16 22:16:32 +0200 | |
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committer | 2025-01-21 17:12:44 +0200 | |
commit | d6d4dc22d50312132ea312f1074e4367e219254c (patch) | |
tree | 1851d25f9da5792921bc5432a3c148f8e9cf12d2 | |
parent | drm/i915: Handle interlaced modes in intel_set_transcoder_timings_lrr() (diff) | |
download | wireguard-linux-d6d4dc22d50312132ea312f1074e4367e219254c.tar.xz wireguard-linux-d6d4dc22d50312132ea312f1074e4367e219254c.zip |
drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updates
Update TRANS_SET_CONTEXT_LATENCY in intel_set_transcoder_timings_lrr()
as well. While for actual LRR updates this should not change, I want
to reuse this code to also sanitize the vblank delay during boot,
and in that case we do need to update this.
Cc: Paz Zcharya <pazz@chromium.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250116201637.22486-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 29879ad0ed56..e6501143ab7c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2930,6 +2930,10 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc } if (DISPLAY_VER(dev_priv) >= 13) { + intel_de_write(dev_priv, + TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder), + crtc_vblank_start - crtc_vdisplay); + /* * VBLANK_START not used by hw, just clear it * to make it stand out in register dumps. |