diff options
| author |   Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2025-01-14 19:30:04 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-03 11:07:05 +0100 |
| commit | d871a94062a3a32510b503df58ed60fd86f2b14f (patch) | |
| tree | f41582952954ca568cbaf49d1d44f8b5dfe34e87 | |
| parent | clk: renesas: r8a779a0: Add ISP core clocks (diff) | |
| download | wireguard-linux-d871a94062a3a32510b503df58ed60fd86f2b14f.tar.xz wireguard-linux-d871a94062a3a32510b503df58ed60fd86f2b14f.zip | |
clk: renesas: r8a779g0: Add ISP core clocks
Add the ISP core modules clock for Renesas R-Car V4H.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250114183005.2761213-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index d45571096b96..015b9773cc55 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -163,6 +163,8 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { + DEF_MOD("isp0", 16, R8A779G0_CLK_S0D2_VIO), + DEF_MOD("isp1", 17, R8A779G0_CLK_S0D2_VIO), DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC), |