diff options
| author |   Alex Bee <knaerzche@gmail.com> | 2024-05-09 16:06:50 +0200 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2024-05-28 16:38:29 +0200 |
| commit | e745698209837a952d4515bc02cddd5a31a644b9 (patch) | |
| tree | 09b088040ab6c907f0cbf2e582fdcf22604dd524 | |
| parent | clk: rockchip: rk3128: Export PCLK_MIPIPHY (diff) | |
| download | wireguard-linux-e745698209837a952d4515bc02cddd5a31a644b9.tar.xz wireguard-linux-e745698209837a952d4515bc02cddd5a31a644b9.zip | |
clk: rockchip: rk3128: Add hclk_vio_h2p to critical clocks
The DSI controller needs this clock to be enabled in order to be able to
access the registers. Make it critical for that purpose.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20240509140653.168591-5-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3128.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c index a20d1fd25e2a..d076b7971f33 100644 --- a/drivers/clk/rockchip/clk-rk3128.c +++ b/drivers/clk/rockchip/clk-rk3128.c @@ -563,6 +563,7 @@ static const char *const rk3128_critical_clocks[] __initconst = { "pclk_cpu", "aclk_peri", "hclk_peri", + "hclk_vio_h2p", "pclk_peri", "pclk_pmu", "sclk_timer5", |