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| author |   Dmitry Osipenko <digetx@gmail.com> | 2021-03-02 15:09:59 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2021-03-24 16:09:02 +0100 |
| commit | e7c54567cac3bd96acd726f4421385ec25cac85d (patch) | |
| tree | 21f1ec22f17440dfdbb95c87c16cd9843b10ea17 | |
| parent | ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node (diff) | |
| download | wireguard-linux-e7c54567cac3bd96acd726f4421385ec25cac85d.tar.xz wireguard-linux-e7c54567cac3bd96acd726f4421385ec25cac85d.zip | |
ARM: tegra: nexus7: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.
If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.
Hence specify all CPU cores as a cooling devices in the device-tree.
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi index ac1c1a63eb0e..dc773b1bf8ee 100644 --- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi @@ -1056,19 +1056,22 @@ #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { cpu-supply = <&vdd_cpu>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; - cpu@2 { + cpu2: cpu@2 { cpu-supply = <&vdd_cpu>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; - cpu@3 { + cpu3: cpu@3 { cpu-supply = <&vdd_cpu>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; }; @@ -1281,7 +1284,10 @@ cooling-maps { map0 { trip = <&trip0>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; |