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authorGeert Uytterhoeven <geert+renesas@glider.be>2025-01-07 09:37:29 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-01-07 17:03:01 +0100
commite91609f1c3b0ce06d80b1b3bd0e6b942782be016 (patch)
treeb27c19797027aa6655716ffcac5313684dc07fa4
parentclk: renesas: r9a09g057: Add clock and reset entries for GIC (diff)
downloadwireguard-linux-e91609f1c3b0ce06d80b1b3bd0e6b942782be016.tar.xz
wireguard-linux-e91609f1c3b0ce06d80b1b3bd0e6b942782be016.zip
dt-bindings: clock: renesas,r9a08g045-vbattb: Fix include guard
Add the missing "RENESAS" part to the include guard. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/34953d1e9f472e4f29533ed06cf092dd3c0d1178.1736238939.git.geert+renesas@glider.be
-rw-r--r--include/dt-bindings/clock/renesas,r9a08g045-vbattb.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h b/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h
index 67774eafad06..4cc8fc34b23c 100644
--- a/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h
+++ b/include/dt-bindings/clock/renesas,r9a08g045-vbattb.h
@@ -2,12 +2,12 @@
*
* Copyright (C) 2024 Renesas Electronics Corp.
*/
-#ifndef __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__
-#define __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__
+#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A08G045_VBATTB_H__
+#define __DT_BINDINGS_CLOCK_RENESAS_R9A08G045_VBATTB_H__
#define VBATTB_XC 0
#define VBATTB_XBYP 1
#define VBATTB_MUX 2
#define VBATTB_VBATTCLK 3
-#endif /* __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ */
+#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A08G045_VBATTB_H__ */