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authorThierry Reding <treding@nvidia.com>2021-10-05 19:10:57 +0200
committerThierry Reding <treding@nvidia.com>2021-10-05 19:10:57 +0200
commitf083c4b1f84d1bcda5b090c118b1a917b5297b91 (patch)
tree4200fe51acf112b1de92b97753dcaafc7ed40e62
parentLinux 5.15-rc1 (diff)
parentclk: tegra: Add stubs needed for compile testing (diff)
downloadwireguard-linux-f083c4b1f84d1bcda5b090c118b1a917b5297b91.tar.xz
wireguard-linux-f083c4b1f84d1bcda5b090c118b1a917b5297b91.zip
Merge branch 'for-5.16/clk' into for-5.16/cpuidle
-rw-r--r--include/linux/clk/tegra.h24
1 files changed, 23 insertions, 1 deletions
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index d128ad1570aa..3650e926e93f 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -42,6 +42,7 @@ struct tegra_cpu_car_ops {
#endif
};
+#ifdef CONFIG_ARCH_TEGRA
extern struct tegra_cpu_car_ops *tegra_cpu_car_ops;
static inline void tegra_wait_cpu_in_reset(u32 cpu)
@@ -83,8 +84,29 @@ static inline void tegra_disable_cpu_clock(u32 cpu)
tegra_cpu_car_ops->disable_clock(cpu);
}
+#else
+static inline void tegra_wait_cpu_in_reset(u32 cpu)
+{
+}
-#ifdef CONFIG_PM_SLEEP
+static inline void tegra_put_cpu_in_reset(u32 cpu)
+{
+}
+
+static inline void tegra_cpu_out_of_reset(u32 cpu)
+{
+}
+
+static inline void tegra_enable_cpu_clock(u32 cpu)
+{
+}
+
+static inline void tegra_disable_cpu_clock(u32 cpu)
+{
+}
+#endif
+
+#if defined(CONFIG_ARCH_TEGRA) && defined(CONFIG_PM_SLEEP)
static inline bool tegra_cpu_rail_off_ready(void)
{
if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready))