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authorDmitry Osipenko <dmitry.osipenko@collabora.com>2025-02-17 01:16:33 +0300
committerThomas Gleixner <tglx@linutronix.de>2025-02-21 09:58:08 +0100
commitf15be3d4a0a55db2b50f319c378a2d16ceb21f86 (patch)
tree4572299a11129d72aca4873c31a2ecd232142a58
parentirqchip/gic-v3: Add Rockchip 3568002 erratum workaround (diff)
downloadwireguard-linux-f15be3d4a0a55db2b50f319c378a2d16ceb21f86.tar.xz
wireguard-linux-f15be3d4a0a55db2b50f319c378a2d16ceb21f86.zip
arm64: dts: rockchip: rk356x: Add MSI controller node
Rockchip 356x SoC's GIC has two hardware integration issues that affect MSI functionality of the GIC. Previously, both these GIC issues were worked around by using MBI for MSI instead of ITS because kernel GIC driver didn't have necessary quirks. First issue is about RK356x GIC not supporting programmable shareability, while reporting it as supported in a GIC's feature register. Rockchip assigned Erratum ID #3568001 for this issue. This patch adds dma-noncoherent property to the GIC node, denoting that a SW workaround is required for mitigating the issue. Second issue is about GIC AXI master interface addressing limited to the first 4GB of physical address space. Rockchip assigned Erratum ID #3568002 for this issue. Now that kernel supports quirks for both of the erratums, add MSI controller node to RK356x device-tree. Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250216221634.364158-3-dmitry.osipenko@collabora.com
-rw-r--r--arch/arm64/boot/dts/rockchip/rk356x-base.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index e55390629114..89ba0d7f47f7 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -284,6 +284,18 @@
mbi-alias = <0x0 0xfd410000>;
mbi-ranges = <296 24>;
msi-controller;
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ dma-noncoherent;
+
+ its: msi-controller@fd440000 {
+ compatible = "arm,gic-v3-its";
+ reg = <0x0 0xfd440000 0 0x20000>;
+ dma-noncoherent;
+ msi-controller;
+ #msi-cells = <1>;
+ };
};
usb_host0_ehci: usb@fd800000 {