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| author |   Daniel Parks <danielrparks@ti.com> | 2022-08-08 13:32:00 -0500 |
|---|---|---|
| committer |   Vignesh Raghavendra <vigneshr@ti.com> | 2022-09-01 15:36:04 +0530 |
| commit | f42f6f9e77ee6b1b86c006d0436ba303901529a9 (patch) | |
| tree | 256c8c103e7d9fb046b74ceabce78b178b74138b | |
| parent | arm64: dts: ti: k3-am64-main: Enable crypto accelerator (diff) | |
| download | wireguard-linux-f42f6f9e77ee6b1b86c006d0436ba303901529a9.tar.xz wireguard-linux-f42f6f9e77ee6b1b86c006d0436ba303901529a9.zip | |
arm64: dts: ti: k3-j721e-main: fix RNG node clock id
The RNG node for this platform claims pka_in_clk. Change it to claim the
correct clock x1_clk. [1]
[1]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html#clocks-for-sa2-ul0-device
Signed-off-by: Daniel Parks <danielrparks@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/f29e2c65dc7310a926af8a676651592afac04b03.1659981162.git.danielrparks@ti.com
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 43b6cf5791ee..917c9dc99efa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -343,7 +343,7 @@ compatible = "inside-secure,safexcel-eip76"; reg = <0x0 0x4e10000 0x0 0x7d>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&k3_clks 264 1>; + clocks = <&k3_clks 264 2>; }; }; |