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| author |   Deepak S <deepak.s@linux.intel.com> | 2015-03-28 15:23:35 +0530 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-16 16:05:24 +0200 |
| commit | f4f71c7dfc5c989f53a1861f3ac42e24018fad4c (patch) | |
| tree | 054ac4fb2f54bf9f836871305fe1aeb7ec7892ea | |
| parent | drm/i915: Add a delay in Displayport AUX transactions for compliance testing (diff) | |
| download | wireguard-linux-f4f71c7dfc5c989f53a1861f3ac42e24018fad4c.tar.xz wireguard-linux-f4f71c7dfc5c989f53a1861f3ac42e24018fad4c.zip | |
drm/i915: Re-adjusting rc6 promotional timer for chv
After feedback from the hardware team we are changing the RC6
promotional timer to increase the power saving without
changing performance.
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a80bfd565ce4..a7516ed24eee 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5046,8 +5046,8 @@ static void cherryview_enable_rps(struct drm_device *dev) I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); I915_WRITE(GEN6_RC_SLEEP, 0); - /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */ - I915_WRITE(GEN6_RC6_THRESHOLD, 0x557); + /* TO threshold set to 500 us ( 0x186 * 1.28 us) */ + I915_WRITE(GEN6_RC6_THRESHOLD, 0x186); /* allows RC6 residency counter to work */ I915_WRITE(VLV_COUNTER_CONTROL, |