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| author |   Zhan Liu <zhan.liu@amd.com> | 2022-01-19 16:55:16 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-01-19 22:33:36 -0500 |
| commit | f548f4291e89e6144d3c5b8a9ada66c7dbaa1639 (patch) | |
| tree | cc59ef4fd2c27ff0b9facfecf7d6fbedea57b0b4 | |
| parent | drm/amdkfd: enable heavy-weight TLB flush on Arcturus (diff) | |
| download | wireguard-linux-f548f4291e89e6144d3c5b8a9ada66c7dbaa1639.tar.xz wireguard-linux-f548f4291e89e6144d3c5b8a9ada66c7dbaa1639.zip | |
drm/amd/display: Correct MPC split policy for DCN301
[Why]
DCN301 has seamless boot enabled. With MPC split enabled
at the same time, system will hang.
[How]
Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have
ODM combine enabled on DCN301, pipe split is not necessary here.
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c index c1c6e602b06c..b4001233867c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = { .disable_clock_gate = true, .disable_pplib_clock_request = true, .disable_pplib_wm_range = true, - .pipe_split_policy = MPC_SPLIT_DYNAMIC, + .pipe_split_policy = MPC_SPLIT_AVOID, .force_single_disp_pipe_split = false, .disable_dcc = DCC_ENABLE, .vsr_support = true, |