diff options
| author |   Manorit Chawdhry <m-chawdhry@ti.com> | 2024-10-24 10:51:00 +0530 |
|---|---|---|
| committer |   Vignesh Raghavendra <vigneshr@ti.com> | 2024-10-28 20:47:23 +0530 |
| commit | f54d577df4a06c8e075ba9c1bd8fd6c18167d47e (patch) | |
| tree | 34eb3e957e9d8d270a4a24bb07403f0c6c50dc1f | |
| parent | arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-* (diff) | |
| download | wireguard-linux-f54d577df4a06c8e075ba9c1bd8fd6c18167d47e.tar.xz wireguard-linux-f54d577df4a06c8e075ba9c1bd8fd6c18167d47e.zip | |
arm64: dts: ti: k3-j784s4: Add bootph-* properties
The following nodes are being used in the bootloaders. Adds bootph-*
properties to the leaf nodes to enable bootloaders to utilise them.
Following adds bootph-* to
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
System Controller
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-3-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi index 46bc2a3e4aea..9638130caece 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi @@ -57,6 +57,8 @@ reg = <0x00 0x43600000 0x00 0x10000>, <0x00 0x44880000 0x00 0x20000>, <0x00 0x44860000 0x00 0x20000>; + bootph-pre-ram; + /* * Marked Disabled: * Node is incomplete as it is meant for bootloaders and @@ -512,6 +514,8 @@ reg = <0x00 0x2a480000 0x00 0x80000>, <0x00 0x2a380000 0x00 0x80000>, <0x00 0x2a400000 0x00 0x80000>; + bootph-pre-ram; + /* * Marked Disabled: * Node is incomplete as it is meant for bootloaders and @@ -629,6 +633,7 @@ <0x00 0x42050000 0x00 0x350>; power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; + bootph-pre-ram; }; tscadc0: tscadc@40200000 { |