diff options
| author |   Heiner Kallweit <hkallweit1@gmail.com> | 2020-04-18 23:06:51 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-04-18 20:20:10 -0700 |
| commit | 0360c046ca186be1953d185d5a3631e415381820 (patch) | |
| tree | fe3101114a7fa115f9f8685b3f8b856e68ac9e54 | |
| parent | enetc: permit configuration of rx-vlan-filter with ethtool (diff) | |
| download | wireguard-linux-0360c046ca186be1953d185d5a3631e415381820.tar.xz wireguard-linux-0360c046ca186be1953d185d5a3631e415381820.zip | |
r8169: move setting OCP base to generic init code
Move setting the ocp_base to rtl_init_one(). Where supported the value
is always the same, and if not supported it doesn't hurt.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169_main.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index bf5bf05970a2..f882e8c09987 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -75,6 +75,8 @@ #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) +#define OCP_STD_PHY_BASE 0xa400 + #define RTL_CFG_NO_GBIT 1 /* write/read MMIO register */ @@ -847,8 +849,6 @@ static void r8168_mac_ocp_modify(struct rtl8169_private *tp, u32 reg, u16 mask, r8168_mac_ocp_write(tp, reg, (data & ~mask) | set); } -#define OCP_STD_PHY_BASE 0xa400 - static void r8168g_mdio_write(struct rtl8169_private *tp, int reg, int value) { if (reg == 0x1f) { @@ -5189,8 +5189,6 @@ static int r8169_mdio_register(struct rtl8169_private *tp) static void rtl_hw_init_8168g(struct rtl8169_private *tp) { - tp->ocp_base = OCP_STD_PHY_BASE; - RTL_W32(tp, MISC, RTL_R32(tp, MISC) | RXDV_GATED_EN); if (!rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42)) @@ -5215,8 +5213,6 @@ static void rtl_hw_init_8168g(struct rtl8169_private *tp) static void rtl_hw_init_8125(struct rtl8169_private *tp) { - tp->ocp_base = OCP_STD_PHY_BASE; - RTL_W32(tp, MISC, RTL_R32(tp, MISC) | RXDV_GATED_EN); if (!rtl_udelay_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42)) @@ -5353,6 +5349,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT); tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1; tp->eee_adv = -1; + tp->ocp_base = OCP_STD_PHY_BASE; /* Get the *optional* external "ether_clk" used on some boards */ rc = rtl_get_ether_clk(tp); |