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authorAlexey Brodkin <abrodkin@synopsys.com>2017-08-15 21:13:55 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-09-01 11:26:28 -0700
commita518d63777a4e94e4b2dd86501604ec49ffe86b2 (patch)
treef98d850c9325aa584cc1b05c9820174a07268ccf /Documentation/devicetree/bindings/arc
parentARC: mm: Decouple RAM base address from kernel link address (diff)
downloadwireguard-linux-a518d63777a4e94e4b2dd86501604ec49ffe86b2.tar.xz
wireguard-linux-a518d63777a4e94e4b2dd86501604ec49ffe86b2.zip
ARC: [plat-hsdk] initial port for HSDK board
This initial port adds support of ARC HS Development Kit board with some basic features such serial port, USB, SD/MMC and Ethernet. Essentially we run Linux kernel on all 4 cores (i.e. utilize SMP) and heavily use IO Coherency for speeding-up DMA-aware peripherals. Note as opposed to other ARC boards we link Linux kernel to 0x9000_0000 intentionally because cores 1 and 3 configured with DCCM situated at our more usual link base 0x8000_0000. We still can use memory region starting at 0x8000_0000 as we reallocate DCCM in our platform code. Note that PAE remapping for DMA clients does not work due to an RTL bug, so CREG_PAE register must be programmed to all zeroes, otherwise it will cause problems with DMA to/from peripherals even if PAE40 is not used. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arc')
-rw-r--r--Documentation/devicetree/bindings/arc/hsdk.txt7
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diff --git a/Documentation/devicetree/bindings/arc/hsdk.txt b/Documentation/devicetree/bindings/arc/hsdk.txt
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+Synopsys DesignWare ARC HS Development Kit Device Tree Bindings
+---------------------------------------------------------------------------
+
+ARC HSDK Board with quad-core ARC HS38x4 in silicon.
+
+Required root node properties:
+ - compatible = "snps,hsdk";