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authorRob Herring <robh@kernel.org>2019-08-16 16:51:46 -0500
committerRob Herring <robh@kernel.org>2019-08-28 16:40:21 -0500
commit553cedf60056dc55366b060104cf9b694efe9bbf (patch)
tree2837f00df9330abcf962dbf808611f801c0597e6 /Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
parentdt-bindings: irq: Convert Allwinner NMI Controller to a schema (diff)
downloadwireguard-linux-553cedf60056dc55366b060104cf9b694efe9bbf.tar.xz
wireguard-linux-553cedf60056dc55366b060104cf9b694efe9bbf.zip
dt-bindings: Convert Arm Mali Midgard GPU to DT schema
Convert the Arm Midgard GPU binding to DT schema format. The 'clocks' property is now required. This simplifies the schema as effectively all the users require 'clocks' already and the upstream driver requires at least one clock. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rob Herring <robh@kernel.org>
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+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali Midgard GPU
+
+maintainers:
+ - Rob Herring <robh@kernel.org>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - allwinner,sun50i-h6-mali
+ - const: arm,mali-t720
+ - items:
+ - enum:
+ - amlogic,meson-gxm-mali
+ - const: arm,mali-t820
+ - items:
+ - enum:
+ - rockchip,rk3288-mali
+ - const: arm,mali-t760
+ - items:
+ - enum:
+ - rockchip,rk3399-mali
+ - const: arm,mali-t860
+ - items:
+ - enum:
+ - samsung,exynos5433-mali
+ - const: arm,mali-t760
+
+ # "arm,mali-t604"
+ # "arm,mali-t624"
+ # "arm,mali-t628"
+ # "arm,mali-t830"
+ # "arm,mali-t880"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Job interrupt
+ - description: MMU interrupt
+ - description: GPU interrupt
+
+ interrupt-names:
+ items:
+ - const: job
+ - const: mmu
+ - const: gpu
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: bus
+
+ mali-supply:
+ maxItems: 1
+
+ resets:
+ minItems: 1
+ maxItems: 2
+
+ operating-points-v2: true
+
+ "#cooling-cells":
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun50i-h6-mali
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ required:
+ - clock-names
+ - resets
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amlogic,meson-gxm-mali
+ then:
+ properties:
+ resets:
+ minItems: 2
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ gpu@ffa30000 {
+ compatible = "rockchip,rk3288-mali", "arm,mali-t760";
+ reg = <0xffa30000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&cru 0>;
+ mali-supply = <&vdd_gpu>;
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power 0>;
+ #cooling-cells = <2>;
+ };
+
+ gpu_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+
+ opp@533000000 {
+ opp-hz = /bits/ 64 <533000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@450000000 {
+ opp-hz = /bits/ 64 <450000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1125000>;
+ };
+ opp@350000000 {
+ opp-hz = /bits/ 64 <350000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp@266000000 {
+ opp-hz = /bits/ 64 <266000000>;
+ opp-microvolt = <1025000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ opp-microvolt = <925000>;
+ };
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <912500>;
+ };
+ };
+
+...