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authorLinus Walleij <linus.walleij@linaro.org>2017-05-15 19:23:12 +0200
committerBjorn Helgaas <bhelgaas@google.com>2017-07-02 18:42:35 -0500
commitd1ef28900d6607ea7a25c39a3bd1ce152f6ab24a (patch)
treea709d1e6d9e2ca8327bb45929ddf7ed3d40118b1 /Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
parentarm64: PCI: Drop DT IRQ allocation from pcibios_alloc_irq() (diff)
downloadwireguard-linux-d1ef28900d6607ea7a25c39a3bd1ce152f6ab24a.tar.xz
wireguard-linux-d1ef28900d6607ea7a25c39a3bd1ce152f6ab24a.zip
PCI: faraday: Add clock bindings
The Faraday FTPCI100 controller has two clock ports, PCLK and PCICLK. Add bindings for these two clocks so we can assign them in the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/faraday,ftpci100.txt')
-rw-r--r--Documentation/devicetree/bindings/pci/faraday,ftpci100.txt7
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt b/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
index 35d4a979bb7b..89a84f8aa621 100644
--- a/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
+++ b/Documentation/devicetree/bindings/pci/faraday,ftpci100.txt
@@ -30,6 +30,13 @@ Mandatory properties:
128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
pre-fetchable.
+Optional properties:
+- clocks: when present, this should contain the peripheral clock (PCLK) and the
+ PCI clock (PCICLK). If these are not present, they are assumed to be
+ hard-wired enabled and always on. The PCI clock will be 33 or 66 MHz.
+- clock-names: when present, this should contain "PCLK" for the peripheral
+ clock and "PCICLK" for the PCI-side clock.
+
Mandatory subnodes:
- For "faraday,ftpci100" a node representing the interrupt-controller inside the
host bridge is mandatory. It has the following mandatory properties: