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authorRemi Pommarel <repk@triplefau.lt>2020-01-24 00:29:37 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-03-04 10:49:58 +0000
commit636a0e4b079483437c1b673eda69b7e4f12b00f9 (patch)
tree13d5bdb02b287e51905be5883ec281d933eea475 /Documentation/devicetree/bindings/phy
parentLinux 5.6-rc1 (diff)
downloadwireguard-linux-636a0e4b079483437c1b673eda69b7e4f12b00f9.tar.xz
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dt-bindings: Add AXG PCIE PHY bindings
Add documentation for PCIE PHYs found in AXG SoCs. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml52
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
new file mode 100644
index 000000000000..086478aec946
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-pcie.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Amlogic AXG PCIE PHY
+
+maintainers:
+ - Remi Pommarel <repk@triplefau.lt>
+
+properties:
+ compatible:
+ const: amlogic,axg-pcie-phy
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: analog
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - phys
+ - phy-names
+ - resets
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
+ #include <dt-bindings/phy/phy.h>
+ pcie_phy: pcie-phy@ff644000 {
+ compatible = "amlogic,axg-pcie-phy";
+ reg = <0x0 0xff644000 0x0 0x1c>;
+ resets = <&reset RESET_PCIE_PHY>;
+ phys = <&mipi_analog_phy PHY_TYPE_PCIE>;
+ phy-names = "analog";
+ #phy-cells = <0>;
+ };