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authorTomer Maimon <tmaimon77@gmail.com>2019-11-06 16:53:29 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2020-01-02 12:25:05 +0100
commitc6ed90b54f0869bddcd3f4c200edfcec3d1b9ae8 (patch)
tree6d0799851d09cb4907e0b1fc4b7d38bc36ab0bbb /Documentation/devicetree/bindings/reset
parentLinux 5.5-rc3 (diff)
downloadwireguard-linux-c6ed90b54f0869bddcd3f4c200edfcec3d1b9ae8.tar.xz
wireguard-linux-c6ed90b54f0869bddcd3f4c200edfcec3d1b9ae8.zip
dt-bindings: reset: add NPCM reset controller documentation
Added device tree binding documentation for Nuvoton BMC NPCM reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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+Nuvoton NPCM Reset controller
+
+Required properties:
+- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC
+- reg : specifies physical base address and size of the register.
+- #reset-cells: must be set to 2
+
+Optional property:
+- nuvoton,sw-reset-number - Contains the software reset number to restart the SoC.
+ NPCM7xx contain four software reset that represent numbers 1 to 4.
+
+ If 'nuvoton,sw-reset-number' is not specfied software reset is disabled.
+
+Example:
+ rstc: rstc@f0801000 {
+ compatible = "nuvoton,npcm750-reset";
+ reg = <0xf0801000 0x70>;
+ #reset-cells = <2>;
+ nuvoton,sw-reset-number = <2>;
+ };
+
+Specifying reset lines connected to IP NPCM7XX modules
+======================================================
+example:
+
+ spi0: spi@..... {
+ ...
+ resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
+ ...
+ };
+
+The index could be found in <dt-bindings/reset/nuvoton,npcm7xx-reset.h>.