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authorRob Herring <robh@kernel.org>2020-03-10 14:32:14 -0500
committerRob Herring <robh@kernel.org>2020-03-10 14:32:14 -0500
commiteb32d1e45ecdc92b19bcbeae0a98c905820a780b (patch)
tree7cba65bb6ff5a2437b52dfc0de8abc0e6d9eb2a7 /Documentation/devicetree/bindings/reset
parentdt-bindings: pwm: Update bindings for MT7629 SoC (diff)
parentdt-bindings: arm: Fixup the DT bindings for hierarchical PSCI states (diff)
downloadwireguard-linux-eb32d1e45ecdc92b19bcbeae0a98c905820a780b.tar.xz
wireguard-linux-eb32d1e45ecdc92b19bcbeae0a98c905820a780b.zip
Merge branch 'dt/linus' into dt/next
Diffstat (limited to 'Documentation/devicetree/bindings/reset')
-rw-r--r--Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt b/Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt
index b4edaf7c7ff3..2880d5dda95e 100644
--- a/Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt
+++ b/Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt
@@ -3,4 +3,4 @@ STMicroelectronics STM32MP1 Peripheral Reset Controller
The RCC IP is both a reset and a clock controller.
-Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt
+Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml