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| author |   Akash Asthana <akashast@codeaurora.org> | 2020-05-27 11:57:44 +0530 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2020-05-29 15:30:55 -0600 |
| commit | 41d455bda234a30e2948196d87ba03260f1d776d (patch) | |
| tree | 88af65e2766d3dd9974b2cbb3d4e11a67a0df1c7 /Documentation/devicetree/bindings | |
| parent | dt-bindings: geni-se: Add interconnect binding for GENI QUP (diff) | |
| download | wireguard-linux-41d455bda234a30e2948196d87ba03260f1d776d.tar.xz wireguard-linux-41d455bda234a30e2948196d87ba03260f1d776d.zip | |
dt-bindings: serial: Add binding for UART pin swap
Add documentation to support RX-TX & CTS-RTS GPIO pin swap in HW.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/serial/serial.yaml | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml index 53204d90d0c7..8645d0e526b4 100644 --- a/Documentation/devicetree/bindings/serial/serial.yaml +++ b/Documentation/devicetree/bindings/serial/serial.yaml @@ -67,6 +67,14 @@ properties: (wired and enabled by pinmux configuration). This depends on both the UART hardware and the board wiring. + rx-tx-swap: + type: boolean + description: RX and TX pins are swapped. + + cts-rts-swap: + type: boolean + description: CTS and RTS pins are swapped. + if: required: - uart-has-rtscts |