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| author |   Akash Asthana <akashast@codeaurora.org> | 2020-05-27 11:57:43 +0530 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2020-05-29 15:30:55 -0600 |
| commit | add953dc472d49e052964cf6ce517f353525b0aa (patch) | |
| tree | 79e4946d4036485870864b45d032ac20be8438a6 /Documentation/devicetree/bindings | |
| parent | dt-bindings: geni-se: Convert QUP geni-se bindings to YAML (diff) | |
| download | wireguard-linux-add953dc472d49e052964cf6ce517f353525b0aa.tar.xz wireguard-linux-add953dc472d49e052964cf6ce517f353525b0aa.zip | |
dt-bindings: geni-se: Add interconnect binding for GENI QUP
Add documentation for the interconnect and interconnect-names properties
for the GENI QUP.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index fbd4b63023c5..dee8bb2b69fe 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -45,6 +45,12 @@ properties: ranges: true + interconnects: + maxItems: 1 + + interconnect-names: + const: qup-core + required: - compatible - reg @@ -72,6 +78,17 @@ patternProperties: description: Serial engine core clock needed by the device. maxItems: 1 + interconnects: + minItems: 2 + maxItems: 3 + + interconnect-names: + minItems: 2 + items: + - const: qup-core + - const: qup-config + - const: qup-memory + required: - reg - clock-names |