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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-05-19 09:42:29 +0200 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2020-05-28 15:06:36 -0600 |
| commit | edaa9c460996068a128775f58e71bcd104c8203e (patch) | |
| tree | cf90979bb60c9b0c1eb57c64da7c36372e883d0d /Documentation/devicetree/bindings | |
| parent | dt-bindings: timer: Convert i.MX SYSCTR to json-schema (diff) | |
| download | wireguard-linux-edaa9c460996068a128775f58e71bcd104c8203e.tar.xz wireguard-linux-edaa9c460996068a128775f58e71bcd104c8203e.zip | |
dt-bindings: media: Add missing clock domain description
make dtbs_check:
arch/arm/boot/dts/r7s72100-genmai.dt.yaml: camera@e8210000: 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
Fix this by documenting the missing properties.
Update the example to match reality.
Fixes: 58361eaa11d561f3 ("dt-bindings: media: renesas,ceu: Convert to yaml")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/media/renesas,ceu.yaml | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/renesas,ceu.yaml b/Documentation/devicetree/bindings/media/renesas,ceu.yaml index f2393458814e..c7e1e4fe67e6 100644 --- a/Documentation/devicetree/bindings/media/renesas,ceu.yaml +++ b/Documentation/devicetree/bindings/media/renesas,ceu.yaml @@ -27,6 +27,12 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + port: type: object additionalProperties: false @@ -57,6 +63,8 @@ required: - compatible - reg - interrupts + - clocks + - power-domains - port additionalProperties: false @@ -64,11 +72,14 @@ additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/r7s72100-clock.h> ceu: ceu@e8210000 { reg = <0xe8210000 0x209c>; compatible = "renesas,r7s72100-ceu"; interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp6_clks R7S72100_CLK_CEU>; + power-domains = <&cpg_clocks>; port { ceu_in: endpoint { |