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| author |   Nicholas Piggin <npiggin@gmail.com> | 2022-05-20 22:36:49 +1000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2022-07-27 21:36:04 +1000 |
| commit | 28f07fab26319dacc5675ae01dfc84d82122c59b (patch) | |
| tree | 39715eb682c3033d17f267329ef03cf7704ac4b9 /Documentation/powerpc | |
| parent | powerpc/pci: Add config option for using all 256 PCI buses (diff) | |
| download | wireguard-linux-28f07fab26319dacc5675ae01dfc84d82122c59b.tar.xz wireguard-linux-28f07fab26319dacc5675ae01dfc84d82122c59b.zip | |
powerpc/vdso: Fix __kernel_sync_dicache sequence with coherent icache
Processors with coherent icache require the sequence sync ; icbi ; isync
to entire store->execute coherency. icbi (to any address) must be
executed to ensure isync flushes the pipeline. See "POWER9 Processor
User's Manual, 4.6.2.2 Instruction Cache Block Invalidate (icbi)" for
details.
__kernel_sync_dicache is missing icbi for the coherent icache path.
Add it.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220520123649.258440-1-npiggin@gmail.com
Diffstat (limited to 'Documentation/powerpc')
0 files changed, 0 insertions, 0 deletions