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author | 2025-02-14 11:08:20 -0700 | |
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committer | 2025-02-24 12:14:45 +0200 | |
commit | 094002ce2768893efc4b1ccb62eaf645f72d115d (patch) | |
tree | 86cd066e0f406e3e3483f4d4dd679be6ea611d33 /arch/arm/boot/dts/microchip/sama7d65.dtsi | |
parent | ARM: dts: microchip: sama7d65: Add chipID for sama7d65 (diff) | |
download | wireguard-linux-094002ce2768893efc4b1ccb62eaf645f72d115d.tar.xz wireguard-linux-094002ce2768893efc4b1ccb62eaf645f72d115d.zip |
ARM: dts: microchip: sama7d65: Add DMAs to sama7d65 SoC
Add DMAs to the SAMA7D65 SoC device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com
[claudiu.beznea: dropped extra space in reg property of dma0]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to '')
-rw-r--r-- | arch/arm/boot/dts/microchip/sama7d65.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index f321f6b7ded4..92a5347e35b5 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -9,6 +9,7 @@ */ #include <dt-bindings/clock/at91.h> +#include <dt-bindings/dma/at91.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> @@ -88,6 +89,17 @@ reg = <0xe0020000 0x8>; }; + dma2: dma-controller@e1200000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = <0xe1200000 0x1000>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "dma_clk"; + dma-requests = <0>; + status = "disabled"; + }; + sdmmc1: mmc@e1208000 { compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci"; reg = <0xe1208000 0x400>; @@ -100,6 +112,26 @@ status = "disabled"; }; + dma0: dma-controller@e1610000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = <0xe1610000 0x1000>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "dma_clk"; + status = "disabled"; + }; + + dma1: dma-controller@e1614000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = <0xe1614000 0x1000>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "dma_clk"; + status = "disabled"; + }; + pit64b0: timer@e1800000 { compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"; reg = <0xe1800000 0x100>; |