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| author |   Johan Jonker <jbx6244@gmail.com> | 2020-01-15 19:52:43 +0100 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2020-01-18 23:54:15 +0100 |
| commit | fed1fc5194884a22857cc642e64b13b36ce47a12 (patch) | |
| tree | 498664a5a43a13cd7733bb7d2441a232afb4bcb8 /arch/arm/boot/dts/rk3036.dtsi | |
| parent | ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc (diff) | |
| download | wireguard-linux-fed1fc5194884a22857cc642e64b13b36ce47a12.tar.xz wireguard-linux-fed1fc5194884a22857cc642e64b13b36ce47a12.zip | |
ARM: dts: rockchip: rename dwmmc node names to mmc
Current dts files with 'dwmmc' nodes are manually verified.
In order to automate this process rockchip-dw-mshc.txt
has to be converted to yaml. In the new setup
rockchip-dw-mshc.yaml will inherit properties from
mmc-controller.yaml and synopsys-dw-mshc-common.yaml.
'dwmmc' will no longer be a valid name for a node,
so change them all to 'mmc'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3036.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3036.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index c70182c5aeb1..cf36e25195b4 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -224,7 +224,7 @@ status = "disabled"; }; - sdmmc: dwmmc@10214000 { + sdmmc: mmc@10214000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; clock-frequency = <37500000>; @@ -238,7 +238,7 @@ status = "disabled"; }; - sdio: dwmmc@10218000 { + sdio: mmc@10218000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10218000 0x4000>; max-frequency = <37500000>; @@ -252,7 +252,7 @@ status = "disabled"; }; - emmc: dwmmc@1021c000 { + emmc: mmc@1021c000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x1021c000 0x4000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |