diff options
| author |   NeilBrown <neilb@suse.de> | 2012-08-01 20:40:02 +1000 |
|---|---|---|
| committer | NeilBrown <neilb@suse.de> | 2012-08-01 20:40:02 +1000 |
| commit | bb181e2e48f8c85db08c9cb015cbba9618dbf05c (patch) | |
| tree | 191bc24dd97bcb174535cc217af082f16da3b43d /arch/arm/mach-tegra/timer.c | |
| parent | md/RAID1: Add missing case for attempting to repair known bad blocks. (diff) | |
| parent | dm raid: move sectors_per_dev calculation (diff) | |
| download | wireguard-linux-bb181e2e48f8c85db08c9cb015cbba9618dbf05c.tar.xz wireguard-linux-bb181e2e48f8c85db08c9cb015cbba9618dbf05c.zip | |
Merge commit 'c039c332f23e794deb6d6f37b9f07ff3b27fb2cf' into md
Pull in pre-requisites for adding raid10 support to dm-raid.
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/mach-tegra/timer.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 315672c7bd48..57b5bdc13b9b 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -189,7 +189,7 @@ static void __init tegra_init_timer(void) " Assuming 12Mhz input clock.\n"); rate = 12000000; } else { - clk_enable(clk); + clk_prepare_enable(clk); rate = clk_get_rate(clk); } @@ -201,7 +201,7 @@ static void __init tegra_init_timer(void) if (IS_ERR(clk)) pr_warn("Unable to get rtc-tegra clock\n"); else - clk_enable(clk); + clk_prepare_enable(clk); switch (rate) { case 12000000: |