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| author | 2011-07-27 00:54:47 -0700 | |
|---|---|---|
| committer | 2011-07-27 00:54:47 -0700 | |
| commit | aa7eb8e78d8ecd6cd0475d86ea8385ff9cb47ece (patch) | |
| tree | 3f9e98fadd5124fb05e8f6f9b06aa23698d4f215 /arch/arm/mm/flush.c | |
| parent | Input: sh_keysc - fix compile warning (diff) | |
| parent | Input: synaptics - fix reporting of min coordinates (diff) | |
| download | wireguard-linux-aa7eb8e78d8ecd6cd0475d86ea8385ff9cb47ece.tar.xz wireguard-linux-aa7eb8e78d8ecd6cd0475d86ea8385ff9cb47ece.zip | |
Merge branch 'next' into for-linus
Diffstat (limited to 'arch/arm/mm/flush.c')
| -rw-r--r-- | arch/arm/mm/flush.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 2b269c955524..1a8d4aa821be 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -253,8 +253,8 @@ void __sync_icache_dcache(pte_t pteval) if (!test_and_set_bit(PG_dcache_clean, &page->flags)) __flush_dcache_page(mapping, page); - /* pte_exec() already checked above for non-aliasing VIPT cache */ - if (cache_is_vipt_nonaliasing() || pte_exec(pteval)) + + if (pte_exec(pteval)) __flush_icache_all(); } #endif @@ -275,7 +275,8 @@ void __sync_icache_dcache(pte_t pteval) * kernel cache lines for later. Otherwise, we assume we have * aliasing mappings. * - * Note that we disable the lazy flush for SMP. + * Note that we disable the lazy flush for SMP configurations where + * the cache maintenance operations are not automatically broadcasted. */ void flush_dcache_page(struct page *page) { |
