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author | Fabrizio Castro <fabrizio.castro.jz@renesas.com> | 2022-11-03 23:06:46 +0000 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-11-08 14:33:09 +0100 |
commit | 278f5015a3deaa2ea0db6070bbc2a8edf2455643 (patch) | |
tree | 70d059eb053cf07f7e99b56e51d2be6931934666 /arch/arm64/boot/dts/renesas/r9a09g011.dtsi | |
parent | arm64: dts: renesas: white-hawk-cpu: Sort RWDT entry correctly (diff) | |
download | wireguard-linux-278f5015a3deaa2ea0db6070bbc2a8edf2455643.tar.xz wireguard-linux-278f5015a3deaa2ea0db6070bbc2a8edf2455643.zip |
arm64: dts: renesas: r9a09g011: Fix unit address format error
Although the HW User Manual for RZ/V2M states in the "Address Map"
section that the interrupt controller is assigned addresses starting
from 0x82000000, the memory locations from 0x82000000 0x0x8200FFFF
are marked as reserved in the "Interrupt Controller (GIC)" section
and are currently not used by the device tree, leading to the below
warning:
arch/arm64/boot/dts/renesas/r9a09g011.dtsi:51.38-63.5: Warning
(simple_bus_reg): /soc/interrupt-controller@82000000: simple-bus unit
address format error, expected "82010000"
Fix the unit address accordingly.
Fixes: fb1929b98f2e ("arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20221103230648.53748-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a09g011.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index fb1a97202c38..0e72a66f8e3a 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -48,7 +48,7 @@ #size-cells = <2>; ranges; - gic: interrupt-controller@82000000 { + gic: interrupt-controller@82010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; #address-cells = <0>; |