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author | 2024-08-22 09:44:54 +0900 | |
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committer | 2024-08-23 15:52:45 +0200 | |
commit | 6ca537aa160ffd2f41cca4af72aeed18c9d41b82 (patch) | |
tree | 96588a983c02eabf8dd8024aabd1e6db53b3f4a2 /arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi | |
parent | arm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes (diff) | |
download | wireguard-linux-6ca537aa160ffd2f41cca4af72aeed18c9d41b82.tar.xz wireguard-linux-6ca537aa160ffd2f41cca4af72aeed18c9d41b82.zip |
arm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0
Enable PCIe Host controller channel 0 on R-Car V4H White Hawk boards.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822004454.1087582-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to '')
-rw-r--r-- | arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi index 80496fb3d476..3845b413bd24 100644 --- a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +++ b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi @@ -117,6 +117,12 @@ }; }; + pcie_clk: clk-9fgv0841-pci { + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + }; + reg_1p2v: regulator-1p2v { compatible = "regulator-fixed"; regulator-name = "fixed-1.2V"; @@ -288,6 +294,18 @@ status = "okay"; }; +&pcie0_clkref { + compatible = "gpio-gate-clock"; + clocks = <&pcie_clk>; + enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; + /delete-property/ clock-frequency; +}; + +&pciec0 { + reset-gpio = <&io_expander_a 0 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; |