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| author |   David Heidelberg <david@ixit.cz> | 2021-12-12 00:38:17 +0100 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2021-12-12 13:07:29 +0100 |
| commit | a39891a6e420daeb55abc99cde4278511ac861d7 (patch) | |
| tree | ce25d0c218a3b8dc5f18ba08a70ef8e6a324a838 /arch/arm64/boot/dts/rockchip/px30.dtsi | |
| parent | arm64: dts: rockchip: Add spi1 pins on Quartz64 A (diff) | |
| download | wireguard-linux-a39891a6e420daeb55abc99cde4278511ac861d7.tar.xz wireguard-linux-a39891a6e420daeb55abc99cde4278511ac861d7.zip | |
arm64: dts: rockchip: Add missing secondary compatible for PX30 DSI
Add second DSI compatible to comply with DT schema validation
comming in the second patch.
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20211211233818.88482-1-david@ixit.cz
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 00f50b05d55a..f972704dfe7a 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1072,7 +1072,7 @@ }; dsi: dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; + compatible = "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0x0 0xff450000 0x0 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_MIPI_DSI>; |