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| author |   Marc Zyngier <maz@kernel.org> | 2022-05-04 08:01:05 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-05-04 08:01:05 +0100 |
| commit | ee87a9bd657e89fe7763cb79cfe1b6bb2d0b0623 (patch) | |
| tree | 904ecc43328c7eefab9b25297b4812a691a83d97 /arch/arm64/kvm/sys_regs.c | |
| parent | KVM: arm64: Hide AArch32 PMU registers when not available (diff) | |
| download | wireguard-linux-ee87a9bd657e89fe7763cb79cfe1b6bb2d0b0623.tar.xz wireguard-linux-ee87a9bd657e89fe7763cb79cfe1b6bb2d0b0623.zip | |
KVM: arm64: Fix new instances of 32bit ESRs
Fix the new instances of ESR being described as a u32, now that
we consistently are using a u64 for this register.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kvm/sys_regs.c')
| -rw-r--r-- | arch/arm64/kvm/sys_regs.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index f3235eafdadc..047f13e89632 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2306,7 +2306,7 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu, size_t nr_global) { struct sys_reg_params params; - u32 esr = kvm_vcpu_get_esr(vcpu); + u64 esr = kvm_vcpu_get_esr(vcpu); int Rt = kvm_vcpu_sys_get_rt(vcpu); int Rt2 = (esr >> 10) & 0x1f; @@ -2353,7 +2353,7 @@ static bool emulate_sys_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *params * registers. Abuse that fact so we can rely on the AArch64 handler for accesses * from AArch32. */ -static bool kvm_esr_cp10_id_to_sys64(u32 esr, struct sys_reg_params *params) +static bool kvm_esr_cp10_id_to_sys64(u64 esr, struct sys_reg_params *params) { u8 reg_id = (esr >> 10) & 0xf; bool valid; @@ -2404,7 +2404,7 @@ static bool kvm_esr_cp10_id_to_sys64(u32 esr, struct sys_reg_params *params) int kvm_handle_cp10_id(struct kvm_vcpu *vcpu) { int Rt = kvm_vcpu_sys_get_rt(vcpu); - u32 esr = kvm_vcpu_get_esr(vcpu); + u64 esr = kvm_vcpu_get_esr(vcpu); struct sys_reg_params params; /* UNDEF on any unhandled register access */ |